Cypress’s PSoC ^® 4 Architecture Delivers the Industry’s Most-Flexible, Lowest-Power ARM ^® Cortex™-M0-Based Devices for Embedded Designs

Truly Scalable, Infinitely Reconfigurable Architecture with Component-Based Design Methodology is Positioned to Challenge 8-, 16-, and 32-bit Standalone MCUs

SAN JOSE, Calif.–(BUSINESS WIRE)– Cypress Semiconductor Corp. (NAS: CY) today unveiled the PSoC^® 4 programmable system-on-chip architecture, which combines Cypress’s best-in-class PSoC analog and digital fabric and industry-leading CapSense^® capacitive touch technology with ARM^®‘s power-efficient Cortex™-M0 core. The truly scalable, cost-efficient architecture delivers PSoC’s trademark flexibility, analog performance and integration, along with access to dozens of free PSoC Components™—”virtual chips” represented by icons in Cypress’s PSoC Creator™ integrated design environment. The new PSoC 4 device class will challenge proprietary 8-bit and 16-bit microcontrollers (MCUs), along with other 32-bit devices. Cypress plans to announce the availability of new PSoC 4 families in the first half of 2013.

The PSoC 4 architecture enhances Cypress’s patented, industry-leading CapSense capacitive-touch sensing technology by offering significant leadership in noise immunity. In addition to capacitive sensing, PSoC 4 targets field-oriented control (FOC) motor control, temperature sensing, security access, portable medical, and many other applications. For more information, visit www.cypress.com/go/psoc4.

“PSoC 4 enables design engineers to leverage the overall trend toward industry-standard, lower-cost ARM-based solutions, the broad availability of ARM software, and the migration of 8-and 16-bit MCU applications to 32-bit solutions,” said John Weil, Senior Director of PSoC Marketing for Cypress’s Programmable Systems Division. “It is the industry’s only fully scalable, infinitely reconfigurable Cortex-M-class MCU with best-in-class analog integration. It can replace entire portfolios of proprietary MCUs and analog solutions, and it is well-positioned to capture significant market share.”

“Inserting the popular Cortex-M0 processor core into the highly-customizable logic and analog circuitry of Cypress’s PSoC products makes a very appealing combination for applications with unique I/O requirements that warrant a higher performance processor or the widely-used ARM architecture,” said Tom Starnes, Principal Analyst with semiconductor market research firm Objective Analysis. “The trim PSoC 4 with the highly optimized Cortex-M0 processor makes it easier to step up from 8- and 16-bit or proprietary MCU architectures.”

The PSoC 4 architecture offers best-in-class power leakage of 150 nA while retaining SRAM memory, programmable logic, and the ability to wake up from an interrupt. In stop mode, it consumes only 20 nA while maintaining wake-up capability. It has the widest operating voltage range of any Cortex-M0-based device, enabling full analog and digital operation from 1.71V to 5.5V. The architecture …read more
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